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PIC16F946
DS41265A-page 200
Preliminary
2005 Microchip Technology Inc.
LCDDATA3
113h
xxxx xxxx
uuuu uuuu
LCDDATA4
114h
xxxx xxxx
uuuu uuuu
LCDDATA5
115h
xxxx xxxx
uuuu uuuu
LCDDATA6
116h
xxxx xxxx
uuuu uuuu
LCDDATA7
117h
xxxx xxxx
uuuu uuuu
LCDDATA8
118h
xxxx xxxx
uuuu uuuu
LCDDATA9
119h
xxxx xxxx
uuuu uuuu
LCDDATA10
11Ah
xxxx xxxx
uuuu uuuu
LCDDATA11
11Bh
xxxx xxxx
uuuu uuuu
LCDSE0
11Ch
0000 0000
uuuu uuuu
LCDSE1
11Dh
0000 0000
uuuu uuuu
LCDSE2
11Eh
0000 0000
uuuu uuuu
TRISF
185h
1111 1111
uuuu uuuu
TRISG
187h
--11 1111
--uu uuuu
PORTF
188h
xxxx xxxx
0000 0000
uuuu uuuu
PORTG
189h
--xx xxxx
--00 0000
--uu uuuu
LCDDATA12
190h
xxxx xxxx
uuuu uuuu
LCDDATA13
191h
xxxx xxxx
uuuu uuuu
LCDDATA14
192h
---- --xx
---- --uu
LCDDATA15
193h
xxxx xxxx
uuuu uuuu
LCDDATA16
194h
xxxx xxxx
uuuu uuuu
LCDDATA17
195h
---- --xx
---- --uu
LCDDATA18
196h
xxxx xxxx
uuuu uuuu
LCDDATA19
197h
xxxx xxxx
uuuu uuuu
LCDDATA20
198h
---- --xx
---- --uu
LCDDATA21
199h
xxxx xxxx
uuuu uuuu
LCDDATA22
19Ah
xxxx xxxx
uuuu uuuu
LCDDATA23
19Bh
---- --xx
---- --uu
LCDSE3
19Ch
0000 0000
uuuu uuuu
LCDSE4
19Dh
0000 0000
uuuu uuuu
LCDSE5
19Eh
---- --00
---- --uu
EECON1
18Ch
x--- x000
u--- q000
u--- uuuu
TABLE 16-4:
INITIALIZATION CONDITION FOR REGISTERS (CONTINUED)
Register
Address
Power-on
Reset
MCLR Reset
WDT Reset
Brown-out Reset(1)
Wake-up from Sleep
through interrupt
Wake-up from Sleep
through WDT time-out
Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1:
If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.
2:
One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
3:
When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
4:
See Table 16-5 for Reset value for specific condition.
5:
If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
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